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CMOS VLSI Layout Artwork Design
and Lab
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ISBN
: 0-9727735-0-9
Table
of Contents
I.
Introduction
II.
CMOS Fabrication Process
III.
Logic Schematic Fundamentals
IV.
VLSI Design Styles
V.
CMOS Layout Styles
VI.
Routing Techniques
VII.
Layout Considerations and Strategy for Design Changes
VIII.
Full Chip Layout and Issues
IX.
Data Management and CAD Tools
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About the Author
Yongbin Kim is an associate professor at Department of Electrical
& Computer Engineering at Northeastern University, Boston, Massachusetts since 1996. He received
Ph.D in Computer Engineering from Colorado State University, MS in Computer Engineering from New Jersey
Institute of Technology, and BS in Electrical Engineering from Sogang University.
To learn more about author, please click here to visit his homepage.
Synopsis
This textbook covers a structured digital MOS design focusing on designing,
verifying, and fabricating CMOS VLSI integrated circuits and modules. This
textbook is designed to emphasize several topics that are essential to the
practice of VLSI design as a system design discipline such as a systematic
design methodology, good understanding of CMOS transistor, physical
implementation of combinational and sequential logic network, and physical
routing and placement issues. Begins design exercises and tutorials with basic
inverters and proceeds to the design, verification, and performance of large
complex digital logic networks. In addition, IC design methodologies and
performance, scaling of MOS circuits, design and layout of subsystems such as
PLA and memory, system timing will be covered. The laboratory includes computer
exercises using CAD tools to design VLSI layouts and switch-level plus
circuit-level simulations to design and analyze the design.
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